FPGA based 16 channel 200MHz / 32 channel 100MHz logic analyzer sump.org
The project includes the actual analyzer in VHDL (for Spartan 3 FPGA) and a PC Software for the end user. The design employs a FPGA board that can be obtained easily.
Features
- 16 channels at 200MHz sampling rate
- 32 channels up to 100MHz sampling rate
- state analysis up to 50MHz using external clock
- connects via EIA232/RS232 (works with usb to serial adapters)
- More….
100Mhz frequency counter and timer - Hardware, AVR, ATmega, ASM, Electronics, HF
In counter mode it provides 1Hz resolution up to 100Mhz. In timer mode maximum resolution is 0.0000001 Hz up to 1Hz. Resolution is reduced by one digit for each additional decade. Multiple frequency updates per second by employing a sliding window for calculation.
“Bill & Dave” takes you through not only the history of the Hewlett-Packard Company, it gives you insight into how the company’s founders thought and acted. Malone particularly points to how Hewlett and Packard dealt with people. He cites many “war” stories, starting at Stanford, through World War II, when Hewlett left the fledgling company for Packard to run, and onward through Packard’s death in 1996 and Hewlett’s death in 2001.”
