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Archive of posts filed under the ASIC EDA category.

CADint Sweden – EDA and CAE design tools

EDA/CAE/CAD software – CADint PCB, ELECTRA Autorouter with Schematic Entry and 3D Board View as well.

CADint Sweden – EDA and CAE design tools
Schematic capture – Draw hierarchical schematic diagrams with an unlimited number of pages
PCB Design – Powerful layout features include net guidelines, manual trace routing with optional mitering or bezier curves, pin and group [...]

Karnaugh Minimizer – Refactoring Code

A tool for developers of small digital devices and radio amateurs, for those who is familiar with Boolean algebra and Karnaugh Map optimization method, best suits for electrical engineering students.

Karnaugh Minimizer – Refactoring Code

Draws 2 – 8 variable Karnaugh Maps
Quine Mc Cluskey minimization
Convert boolean to VHDL / Verilog
Simplifies boolean expressions

Dave Rich – Verification Technologist

Dave Rich is Verification Technologist at Mentor Graphics and is one of the authors of Mentor’s Advanced Verification Methodology cookbook.
Dave Rich at San Francisco Bay Area from Verification Horizons BLOG at Mentor Graphics. Bio Verification Technologist, Verilog/SystemVerilog.
Twitter Interface – @Dave Rich

Altera – FPGA CPLD and ASIC semiconductors

Altera is one of the pioneers of Programmable Logic, following notable early leaders Signetics and MMI in introducing PLDs.
Interface with Twitter – @alteracorp – FPGA, CPLD and ASIC semiconductor devices.
Altera – FPGA CPLD and ASIC semiconductors

EDA and Product Design Ideas

Some Ideas of mine that were put in delabs Tweeter, related to EDA and Product Design
Product Design Optimization
Make Practical (it works), Affordable, Usable (ergonomics), Safe, Reliable (robust), Durable/Consistent & Maintainable (Servicing) Products.
Dust and Contamination in Connectors
Once i opened a RF Millivolt Meter of Marconi Instruments. It did not have a spec of dust inside, not [...]

the ASIC guy – Harry Gries – ASIC Methodology and EDA

the ASIC guy – Harry Gries – ASIC Methodology and EDA
Harry Gries – ASIC Methodology and EDA Technology Consultant.
Harry’s Tweeter

MathWorks Online Webinars

MathWorks Online Webinars
Design and Verify Control Systems using Simulink (Part 4): Real-Time Testing
Design and Verify Signal Processing and Communications Systems (Part 3): DSP Early Software Verification
MathWorks – leading global provider of software for technical computing and Model-Based Design.
MathWorks Webinars Tweeter