ASIC EDA

ASIC and EDA. DSP, FPGA and SOC.

 

Updated daily, SOCcentral brings you the latest news about SOC/ASIC/FPGA design, EDA tools and design methodologies, intellectual property (IP), programmable logic and design reuse.

You’ll also find the abstracts (and links) to more than 1600 relevant magazine and newspaper articles, tutorials, whitepapers, and application notes available on line, as well as the most comprehensive directory of EDA/design service/IP providers available anywhere on the Internet.

SOCcentral – ASIC FPGA EDA


 

eg3 – Embedded Systems fpga vhdl dsp

Board-level (applied computing), DSP, embedded systems, software, real-time or RTOS and internet-enabling information. free stuff from eg3.com.

eg3.com identifies the best of the web for embedded, dsp, board-level (cpci, vme, pc/104…), soc, rtos/realtime, and open source for embedded. we browse, research, and organize the best of the web keyword-by-keyword. the result? less noise, and higher quality information for you. best of all it’s free!

For designers, eg3.com offers the largest, filtered keyword index on the web… it’s searchable , and we even produce a keyword ” buyers guide ” to all the major vendors in the niche.

 

Design And Reuse – SOC IP ASIC Resource Design And Reuse, The Web’s System On Chip Design Resource : catalogs of IPs, Virtual Components, Cores, Embedded Software and Design Tools. IP Reuse Station SoC Collaborative Platform D&R Silicon IP and SoC

 
PTC - Mathcad Electrical Engineering Library

Ideas, Design, Simulation, Emulation and Testing. The fundamentals are governed by Math. The parameters, the metrics, the limits, the specifications. All have to be taken into account, none overlooked. More Meticulous and exhaustive the pre-processing is, the less errors and shocks we get at the end of the product design cycle. I have had my share of jolts, the only reason being, i did not anticipate that jack in the design engineers design box. Remember Murphy is always looking. Plan-Simulate-Proto-Pilot-Execute Here is a tool Mathcad and a module for EE. That helps us in our design goals. Standard calculation procedures, [Read More ....]

 

Advanced course on VLSI system design has evolved from the lecture notes and the additional material used by Prof. Daniel Mlynek and Prof. Yusuf Leblebici in their senior-year course offerings at the Swiss Federal Intitute of Technology – Lausanne… VLSI System Design WebCourse Design of VLSI Systems Unified view of technological, architectural and design-related aspects of VLSI systems… See VLSI design flow Current information on Embedded Systems for uC and ASIC Designers. Inside DSP – signal processing monthly. BDTI’s Pocket Guide – guide to processing engines for embedded applications covers DSP processors, CPUs, microcontrollers, and FPGAs. DSP Dictionary too. Berkeley [Read More ....]

 

You can find many people and firms who interface with twitter here. @delabs/embedded – Embedded System Development, Microcontroller, CPU, SBC, ARM. @delabs/eda-asic – EDA, ASIC, FPGA, CPLD, IP Cores, Simulation, Foundry and SoC. Jason McDonald – eg3 – Embedded Systems – Articles on embedded systems – eg3.com. Also about new products, interviews, research notes, and conferences; in embedded systems, rtos and dsp. eg3com Twitter Embedded System Engineering – Andreas Kaiser – Embedded systems engineer and blogger. -Andreas Tweeter Cool Verification – Hardware verification EDA – “Thoughts on hardware verification, the EDA industry, and related topics from the perspective of JL [Read More ....]

 
BeMicro Altera FPGA Evaluation Kit

Embedded Processor System in an FPGA in Minutes. Low-cost evaluation kit, includes a complete lab. Integrate a custom microprocessor in a Cyclone III FPGA.Example code and even a Nios II a 32-bit embedded-processor RISC CPU soft core. Many peripheral modules are ready for gluing to your processor, right within the software. It then generates the HDL code too. It can then compile and load it on the USB FPGA Prototype Stick. Amazing isn’t it. Try it out. Learn, Explore..Create. New $49 BeMicro FPGA Evaluation Kit Altera is one of the pioneers of Programmable Logic, following notable early leaders Signetics and [Read More ....]

 
See a 3D View of your Eagle Cad Layout

With Eagle3D it is possible to generate a 3D View from your Board Layout. This will help you iron out mechanical clashes, thermal conflicts. Serviceability and Accessibility issues too. See a 3D View of your Eagle Cad Layout On Panel PCB’s Like front/back panels. Usability errors may become visible in this simulation. Connector and wiring layout can be better judged on 3D and strain relief and cable management can be planned in power electronics designs. In sensitive analog circuits; thermal, leakage or guard rings can be inspected. In RF circuits; the shielding, tracks and components can be studied for unwanted [Read More ....]

 
Hamburg Design System - Hades Java

This is a framework for interactive simulation on OO Java. Consists of a graphical editor, the discrete-event based simulation engine(s), libraries of simulation components, a design and library browser, and tools like waveform viewer and scripting shell.. Hamburg Design System – Hades Java It is a tool for teaching basic digital systems design, and for research on system-simulation and hardware/software-cosimulation. All simulation models, signal types, and the simulation kernels can be subclassed, so that Hades can be used for other applications as well, not limited to digital electronics. Hades applet collection. “The current version of the Hades editor also includes [Read More ....]

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