High-technology design software for ICs, analog VLSI, and Design Automation. Includes Analog/Mixed-Signal ICs, ASICs and MEMS. Schematic Capture too.
- Simulation: T-Spice, W-Edit
- Physical Layout: L-Edit
- Verification: HiPer Verify
- Parasitic Layout Extraction
MEMS R&D and Prototyping Services – Fast Turn-around from Order to Product Prototype, Low and Medium Volume Fabrication
A comprehensive solution for analog/mixed-signal IC design rule checking DRC and hierarchical netlist extraction.
With HiPer Verify, you can simply reference the new DRC or LVS command file from the foundry, meeting your existing standards right out of the box.
825 South Myrtle Avenue, Monrovia, CA 91016 USA