These are some updates on Analog and Mixed Design pages online. A/D Converters are important because the world is full of mainly analog signals and parameters. Processing, Filtering, Analyzing and Computing data is best done by software (firmware).
These days the term of firmware can only be used for very small devices. This is because we have more memory, flash and computation ability in tiny footprints. So even a mini gadget can have a Tiny OS sometimes even a Virtual Machine. What is a VM it is is a OS in a OS. Java, .Net.
Time-interleaved Analog-to-digital Converters
TIADCs and TI-ADCs an Article by Dr. Christian Vogel.
“The idea of a time-interleaved ADC (TIADC) is to use a system of M parallel channels, which alternately take one sample (time-interleaved sampling). Thereby, the sampling frequency of one channel does not need to fulfill the Nyquist criterion; however, when in the digital domain all samples are merged into one output sequence the overall sampling frequency fulfills the Nyquist criterion”
The Designer’s Guide Community – A Guide to Simulation & Modeling for Analog & RF Circuit Designers
A Site where analog, mixed-signal and RF circuit designers come to learn about simulation, modeling and design. There are a number of very practical papers on simulation and modeling on the Analysis, Modeling, and Theory pages. A collection of useful example models can be found on the Verilog-AMS page.
Designing Analog Chips by Hans Camenzind
Hans Camenzind book on Analog CMOS design is a good reference for students and covers Power Electronic concepts like Switching Regulators and Low Drop-Out Regulators. The Delta-Sigma Converter A/D and Zero-Crossing Detectors on Mixed Design. Communications circuits like Timers and Oscillators . Phase-Locked Loops and Filters too.
Intersil’s products include amplifiers, analog front ends, communication interfaces, data converters, digital potentiometers, display solutions, DSL solutions, optical storage products, power management products, real time clocks, switches/MUX’s, etc. In 2017 Intersil became a part of Renesas.
Intersil – Analog and Power Semiconductors
Intersil has developed into a leading analog semiconductor manufacturer with five specialized product groups: Consumer Power, Consumer Electronics, Analog Mixed Signal, Industrial Communications and Automotive & Military/Space Specialties.
Intersil was founded in 1967. After being acquired by General Electric Corp in 1981, it was sold to Harris Corporation in 1988, at which point the name was retired. Intersil at Wikipedia.
The JFET-input operational amplifiers in the TL07x series are designed as low-noise versions of the TL08x series amplifiers with low input bias and offset currents and fast slew rate.
Quadrature Oscillator – 100 kHz – TL072-TI – TL072-TI Opamp
The low harmonic distortion and low noise make the TL07x series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single monolithic chip.
Low Power Consumption
Low Input Bias and Offset Currents
High Input Impedance JFET Input Stage
High Slew Rate – 13 V/µs Typ
Common-Mode Input Voltage Range Includes VCC+
The LF198, LF298, LF398 are monolithic sample-and-hold circuits which utilize BI-FET technology to obtain ultra-high dc accuracy with fast acquisition of signal and low droop rate. Operating as a unity gain follower, dc gain accuracy is 0.002% typical and acquisition time is as low as 6 µs to 0.01%. A bipolar input stage is used to achieve low offset voltage and wide bandwidth. Input offset adjust is accomplished with a single pin, and does not degrade input offset drift.
The wide bandwidth allows the LF198 to be included inside the feedback loop of 1 MHz op amps without having stability problems. Input impedance of 1010Ohm allows high source impedances to be used without degrading accuracy.
LF398 – Monolithic Sample and Hold Circuit
P-channel junction FET’s are combined with bipolar devices in the output amplifier to give droop rates as low as 5 mV/min with a 1 µF hold capacitor. The JFET’s have much lower noise than MOS devices used in previous designs and do not exhibit high temperature instabilities. The overall design guarantees no feed-through from input to output in the hold mode, even for input signals equal to the supply voltages.